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VLSI Architecture for Configurable and Low-Complexity Design of Hard-Decision Viterbi Decoding Algorithm



  ID Publisher : 0000012328
  Nama Jurnal : Journal of ICT Research and Application
  Pengarang : Rachmad Vidya Wicaksana Putra, Trio Adiono
  Subjek : conditional adapter; configurable and low-complexity design; harddecision Viterbi; optimized processing element; VLSI architecture
  Edisi : 10 / 1 / April 2016


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